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MCP23008/MCP23S08
8-Bit I/O Expander with Serial Interface
Features
* 8-bit remote bidirectional I/O port - I/O pins default to input * High-speed I2CTM interface (MCP23008) - 100 kHz - 400 kHz - 1.7 MHz * High-speed SPITM interface (MCP23S08) - 10 MHz * Hardware address pins - Three for the MCP23008 to allow up to eight devices on the bus - Two for the MCP23S08 to allow up to four devices using the same chip-select * Configurable interrupt output pin - Configurable as active-high, active-low or open-drain * Configurable interrupt source - Interrupt-on-change from configured defaults or pin change * Polarity Inversion register to configure the polarity of the input port data * External reset input * Low standby current: 1 A (max.) * Operating voltage: - 1.8V to 5.5V @ -40C to +85C (I-Temp) - 2.7V to 5.5V @ -40C to +85C (I-Temp) - 4.5V to 5.5V @ -40C to +125C (E-Temp)
Package Types
MCP23008
SCL SDA A2 A1 A0 RESET NC INT VSS PDIP/SOIC 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 VDD GP7 GP6 GP5 GP4 GP3 GP2 GP1 GP0
SSOP SCL SDA A2 A1 A0 RESET NC INT VSS N/C 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VDD GP7 GP6 GP5 GP4 GP3 GP2 GP1 GP0 N/C
MCP23S08
SCK SI SO A1 A0 RESET CS INT VSS
PDIP/SOIC 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 VDD GP7 GP6 GP5 GP4 GP3 GP2 GP1 GP0
Packages
18-pin PDIP (300 mil) 18-pin SOIC (300 mil) 20-pin SSOP
SSOP SCK SI SO A1 A0 RESET CS INT VSS N/C 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VDD GP7 GP6 GP5 GP4 GP3 GP2 GP1 GP0 N/C
(c) 2005 Microchip Technology Inc.
MCP23S08
MCP23S08
MCP23008
MCP23008
DS21919B-page 1
MCP23008/MCP23S08
Block Diagram
MCP23S08 SCK SI SO MCP23008 SCL SDA MCP23S08 A1:A0 A2:A0 RESET INT Interrupt Logic 8 VDD VSS POR Configuration/ Control Registers 3 Decode Control GPIO Serial Interface Serializer/ Deserializer GP0 GP1 GP2 GP3 GP4 GP5 GP6 GP7
8
DS21919B-page 2
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
1.0 DEVICE OVERVIEW
The interrupt output can be configured to activate under two conditions (mutually exclusive): 1. When any input state differs from its corresponding input port register state. This is used to indicate to the system master that an input state has changed. When an input state differs from a preconfigured register value (DEFVAL register). The MCP23X08 device provides 8-bit, general purpose, parallel I/O expansion for I2C bus or SPI applications. The two devices differ in the number of hardware address pins and the serial interface: * MCP23008 - I2C interface; three address pins * MCP23S08 - SPI interface; two address pins The MCP23X08 consists of multiple 8-bit configuration registers for input, output and polarity selection. The system master can enable the I/Os as either inputs or outputs by writing the I/O configuration bits. The data for each input or output is kept in the corresponding Input or Output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master.
2.
The Interrupt Capture register captures port values at the time of the interrupt, thereby saving the condition that caused the interrupt. The Power-on Reset (POR) sets the registers to their default values and initializes the device state machine. The hardware address pins are used to determine the device address.
1.1
Pin Descriptions
PINOUT DESCRIPTION
Function Serial clock input. Serial data I/O (MCP23008)/Serial data input (MCP23S08). Hardware address input (MCP23008)/Serial data output (MCP23S08). A2 must be biased externally. Hardware address input. Must be biased externally. Hardware address input. Must be biased externally. External reset input No connect (MCP23008)/External chip select input (MCP23S08). Interrupt output. Can be configured for active-high, active-low or open-drain. Ground. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Power.
TABLE 1-1:
Pin Name SCL/SCK SDA/SI A2/SO A1 A0 RESET NC/CS INT VSS GP0 GP1 GP2 GP3 GP4 GP5 GP6 GP7 VDD N/C
PDIP/S Pin SSOP OIC Type 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 12 13 14 15 16 17 18 19 20 10, 11 I I/O I/O I I I I O P I/O I/O I/O I/O I/O I/O I/O I/O P
(c) 2005 Microchip Technology Inc.
DS21919B-page 3
MCP23008/MCP23S08
1.2 Power-on Reset (POR)
1.3.2 1.3.2.1 I2CTM INTERFACE I2C Write Operation
The on-chip POR circuit holds the device in reset until VDD has reached a high enough voltage to deactivate the POR circuit (i.e., release the device from reset). The maximum VDD rise time is specified in Section 2.0 "Electrical Characteristics". When the device exits the POR condition (releases reset), device operating parameters (i.e., voltage, temperature, serial bus frequency, etc.) must be met to ensure proper operation.
The I2C Write operation includes the control byte and register address sequence, as shown in the bottom of Figure 1-1. This sequence is followed by eight bits of data from the master and an Acknowledge (ACK) from the MCP23008. The operation is ended with a STOP or RESTART condition being generated by the master. Data is written to the MCP23008 after every byte transfer. If a STOP or RESTART condition is generated during a data transfer, the data will not be written to the MCP23008. Byte writes and sequential writes are both supported by the MCP23008. The MCP23008 increments its address counter after each ACK during the data transfer.
1.3
Serial Interface
This block handles the functionality of the I2C (MCP23008) or SPI (MCP23S08) interface protocol. The MCP23X08 contains eleven registers that can be addressed through the serial interface block (Table 1-2):
TABLE 1-2:
Address 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah
REGISTER ADDRESSES
Access to: IODIR IPOL GPINTEN DEFVAL INTCON IOCON GPPU INTF INTCAP (Read-only) GPIO OLAT
1.3.2.2
I2C Read Operation
The I2C Read operation includes the control byte sequence, as shown in the bottom of Figure 1-1. This sequence is followed by another control byte (including the START condition and ACK) with the R/W bit equal to a logic 1 (R/W = 1). The MCP23008 then transmits the data contained in the addressed register. The sequence is ended with the master generating a STOP or RESTART condition.
1.3.2.3
I2C Sequential Write/Read
1.3.1
SEQUENTIAL OPERATION BIT
For sequential operations (Write or Read), instead of transmitting a STOP or RESTART condition after the data transfer, the master clocks the next byte pointed to by the address pointer (see Section 1.3.1 "Sequential Operation Bit" for details regarding sequential operation control). The sequence ends with the master sending a STOP or RESTART condition. The MCP23008 address pointer will roll over to address zero after reaching the last register address. Refer to Figure 1-1.
The Sequential Operation (SEQOP) bit (IOCON register) controls the operation of the address pointer. The address pointer can either be enabled (default) to allow the address pointer to increment automatically after each data transfer, or it can be disabled. When operating in Sequential mode (IOCON.SEQOP = 0), the address pointer automatically increments to the next address after each byte is clocked. When operating in Byte mode (IOCON.SEQOP = 1), the MCP23X08 does not increment its address counter after each byte during the data transfer. This gives the ability to continually read the same address by providing extra clocks (without additional control bytes). This is useful for polling the GPIO register for data changes.
1.3.3 1.3.3.1
SPITM INTERFACE SPI Write Operation
The SPI Write operation is started by lowering CS. The Write command (slave address with R/W bit cleared) is then clocked into the device. The opcode is followed by an address and at least one data byte.
1.3.3.2
SPI Read Operation
The SPI Read operation is started by lowering CS. The SPI read command (slave address with R/W bit set) is then clocked into the device. The opcode is followed by an address, with at least one data byte being clocked out of the device.
DS21919B-page 4
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
FIGURE 1-1:
S - START SR - RESTART P - STOP w - Write SR OP R DOUT .... DIN DOUT P S OP W ADDR DIN .... DIN P
MCP23008 I2CTM DEVICE PROTOCOL
R - Read OP ADDR DOUT DIN - Device opcode - Device address - Data out from MCP23008 - Data into MCP23008 SR P OP W .... DIN P
S
OP
R
DOUT
....
DOUT
P
SR
OP
R
DOUT
....
DOUT
P
SR
OP P
W
ADDR
DIN
....
DIN
P
Byte and Sequential Write Byte Sequential S S OP OP W ADDR DIN DIN .... P DIN P
W ADDR
Byte and Sequential Read Byte S Sequential S
OP
OP
R
R
SR
SR
OP
OP
R
R
DOUT
DOUT
P
.... DOUT P
1.3.3.3
SPI Sequential Write/Read
1.4
Hardware Address Decoder
For sequential operations, instead of deselecting the device by raising CS, the master clocks the next byte pointed to by the address pointer. The sequence ends by the raising of CS. The MCP23S08 address pointer will roll over to address zero after reaching the last register address.
The hardware address pins are used to determine the device address. To address a device, the corresponding address bits in the control byte must match the pin state. * MCP23008 has address pins A2, A1 and A0. * MCP23S08 has address pins A1 and A0. The pins must be biased externally.
(c) 2005 Microchip Technology Inc.
DS21919B-page 5
MCP23008/MCP23S08
1.4.1 ADDRESSING I2C DEVICES (MCP23008) FIGURE 1-2: I2CTM CONTROL BYTE FORMAT
Control Byte S 0 1 0 0 A2 A1 A0 R/W ACK The MCP23008 is a slave I2C device that supports 7-bit slave addressing, with the read/write bit filling out the control byte. The slave address contains four fixed bits and three user-defined hardware address bits (pins A2, A1 and A0). Figure 1-2 shows the control byte format.
Slave Address Start bit R/W = 0 = write R/W = 1 = read R/W bit ACK bit
1.4.2
ADDRESSING SPI DEVICES (MCP23S08)
The MCP23S08 is a slave SPI device. The slave address contains five fixed bits and two user-defined hardware address bits (pins A1 and A0), with the read/write bit filling out the control byte. Figure 1-3 shows the control byte format.
FIGURE 1-3:
CS
SPITM CONTROL BYTE FORMAT
Control Byte 0 1 0 0 0 A1 A0 R/W
Slave Address R/W bit R/W = 0 = write R/W = 1 = read
FIGURE 1-4:
S 0 1 0
I2CTM ADDRESSING REGISTERS
0 A2 A1 A0 0 ACK A7 A6 A5 A4 A3 A2 A1 A0 ACK
R/W = 0 Device Opcode Register Address
The ACKs are provided by the MCP23008.
FIGURE 1-5:
CS 0 1 0
SPITM ADDRESSING REGISTERS
0
0
A1 A0 R/W
A7
A6
A5
A4
A3
A2
A1
A0
Device Opcode
Register Address
DS21919B-page 6
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
1.5 GPIO Port 1.6
The GPIO module contains the data port (GPIO), internal pull up resistors and the Output Latches (OLAT). Reading the GPIO register reads the value on the port. Reading the OLAT register only reads the OLAT, not the actual value on the port. Writing to the GPIO register actually causes a write to the OLAT. Writing to the OLAT register forces the associated output drivers to drive to the level in OLAT. Pins configured as inputs turn off the associated output driver and put it in high-impedance.
Configuration and Control Registers
The Configuration and Control blocks contain the registers as shown in Table 1-3.
TABLE 1-3:
Register Name IODIR IPOL GPINTEN DEFVAL INTCON IOCON GPPU INTF INTCAP GPIO OLAT
CONFIGURATION AND CONTROL REGISTERS
bit 7 IO7 IP7 GPINT7 DEF7 IOC7 -- PU7 INT7 ICP7 GP7 OL7 bit 6 IO6 IP6 GPINT6 DEF6 IOC6 -- PU6 INT6 ICP6 GP6 OL6 bit 5 IO5 IP5 GPINT5 DEF5 IOC5 SREAD PU5 INT5 ICP5 GP5 OL5 bit 4 IO4 IP4 GPINT4 DEF4 IOC4 DISSLW PU4 INT4 ICP4 GP4 OL4 bit 3 IO3 IP3 GPINT3 DEF3 IOC3 HAEN * PU3 INT3 ICP3 GP3 OL3 bit 2 IO2 IP2 GPINT2 DEF2 IOC2 ODR PU2 INT2 ICP2 GP2 OL2 bit 1 IO1 IP1 GPINT1 DEF1 IOC1 INTPOL PU1 INT1 ICP1 GP1 OL1 bit 0 IO0 IP0 GPINT0 DEF0 IOC0 -- PU0 INTO ICP0 GP0 OL0 POR/RST value 1111 1111 0000 0000 0000 0000 0000 0000 0000 0000 --00 0000000 0000 0000 0000 0000 0000 0000 0000 0000 0000
Address (hex) 00 01 02 03 04 05 06 07 08 09 0A
* Not used on the MCP23008.
(c) 2005 Microchip Technology Inc.
DS21919B-page 7
MCP23008/MCP23S08
1.6.1 I/O DIRECTION (IODIR) REGISTER
Controls the direction of the data I/O. When a bit is set, the corresponding pin becomes an input. When a bit is clear, the corresponding pin becomes an output.
REGISTER 1-1:
IODIR - I/O DIRECTION REGISTER (ADDR 0x00)
R/W-1 IO7 bit 7 R/W-1 IO6 R/W-1 IO5 R/W-1 IO4 R/W-1 IO3 R/W-1 IO2 R/W-1 IO1 R/W-1 IO0 bit 0
bit 7-0
IO7:IO0: These bits control the direction of data I/O <7:0>. 1 = Pin is configured as an input. 0 = Pin is configured as an output. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
DS21919B-page 8
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
1.6.2 INPUT POLARITY (IPOL) REGISTER
The IPOL register allows the user to configure the polarity on the corresponding GPIO port bits. If a bit is set, the corresponding GPIO register bit will reflect the inverted value on the pin.
REGISTER 1-2:
IPOL - INPUT POLARITY PORT REGISTER (ADDR 0x01)
R/W-0 IP7 bit 7 R/W-0 IP6 R/W-0 IP5 R/W-0 IP4 R/W-0 IP3 R/W-0 IP2 R/W-0 IP1 R/W-0 IP0 bit 0
bit 7-0
IP7:IP0: These bits control the polarity inversion of the input pins <7:0>. 1 = GPIO register bit will reflect the opposite logic state of the input pin. 0 = GPIO register bit will reflect the same logic state of the input pin. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
(c) 2005 Microchip Technology Inc.
DS21919B-page 9
MCP23008/MCP23S08
1.6.3 INTERRUPT-ON-CHANGE CONTROL (GPINTEN) REGISTER
The GPINTEN register controls the interrupt-onchange feature for each pin. If a bit is set, the corresponding pin is enabled for interrupt-on-change. The DEFVAL and INTCON registers must also be configured if any pins are enabled for interrupt-on-change.
REGISTER 1-3:
GPINTEN - INTERRUPT-ON-CHANGE PINS (ADDR 0x02)
R/W-0 GPINT7 bit 7 R/W-0 GPINT6 R/W-0 GPINT5 R/W-0 GPINT4 R/W-0 GPINT3 R/W-0 GPINT2 R/W-0 GPINT1 R/W-0 GPINT0 bit 0
bit 7-0
GPINT7:GPINT0: General purpose I/O interrupt-on-change bits <7:0>. 1 = Enable GPIO input pin for interrupt-on-change event. 0 = Disable GPIO input pin for interrupt-on-change event. Refer to INTCON and GPINTEN. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
DS21919B-page 10
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
1.6.4 DEFAULT COMPARE (DEFVAL) REGISTER FOR INTERRUPT-ONCHANGE
The default comparison value is configured in the DEFVAL register. If enabled (via GPINTEN and INTCON) to compare against the DEFVAL register, an opposite value on the associated pin will cause an interrupt to occur.
REGISTER 1-4:
DEFVAL - DEFAULT VALUE REGISTER (ADDR 0x03)
R/W-0 DEF7 bit 7 R/W-0 DEF6 R/W-0 DEF5 R/W-0 DEF4 R/W-0 DEF3 R/W-0 DEF2 R/W-0 DEF1 R/W-0 DEF0 bit 0
bit 7-0
DEF7:DEF0: These bits set the compare value for pins configured for interrupt-on-change from defaults <7:0>. Refer to INTCON. If the associated pin level is the opposite from the register bit, an interrupt occurs. Refer to INTCON and GPINTEN. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
(c) 2005 Microchip Technology Inc.
DS21919B-page 11
MCP23008/MCP23S08
1.6.5 INTERRUPT CONTROL (INTCON) REGISTER
The INTCON register controls how the associated pin value is compared for the interrupt-on-change feature. If a bit is set, the corresponding I/O pin is compared against the associated bit in the DEFVAL register. If a bit value is clear, the corresponding I/O pin is compared against the previous value.
REGISTER 1-5:
INTCON - INTERRUPT-ON-CHANGE CONTROL REGISTER (ADDR 0x04)
R/W-0 IOC7 bit 7 R/W-0 IOC6 R/W-0 IOC5 R/W-0 IOC4 R/W-0 IOC3 R/W-0 IOC2 R/W-0 IOC1 R/W-0 IOC0 bit 0
bit 7-0
IOC7:IOC0: These bits control how the associated pin value is compared for interrupt-onchange <7:0>. 1 = Controls how the associated pin value is compared for interrupt-on-change. 0 = Pin value is compared against the previous pin value. Refer to INTCON and GPINTEN. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
DS21919B-page 12
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
1.6.6 CONFIGURATION (IOCON) REGISTER
contains several bits for The IOCON register configuring the device: * The Hardware Address Enable (HAEN) control bit enables/disables the hardware address pins (A2, A1) on the MCP23S08. This bit is not used on the MCP23008. The address pins are always enabled on the MCP23008. * The Open-Drain (ODR) control bit enables/disables the INT pin for open-drain configuration. * The Interrupt Polarity (INTPOL) control bit sets the polarity of the INT pin. This bit is functional only when the ODR bit is cleared, configuring the INT pin as active push-pull.
* The Sequential Operation (SEQOP) controls the incrementing function of the address pointer. If the address pointer is disabled, the address pointer does not automatically increment after each byte is clocked during a serial transfer. This feature is useful when it is desired to continuously poll (read) or modify (write) a register. * The Slew Rate (DISSLW) bit controls the slew rate function on the SDA pin. If enabled, the SDA slew rate will be controlled when driving from a high to a low.
REGISTER 1-6:
IOCON - I/O EXPANDER CONFIGURATION REGISTER (ADDR 0x05)
U-0 -- bit 7 U-0 -- R/W-0 SEQOP R/W-0 DISSLW R/W-0 HAEN R/W-0 ODR R/W-0 INTPOL U-0 -- bit 0
bit 7-6 bit 5
Unimplemented: Read as `0'. SEQOP: Sequential Operation mode bit. 1 = Sequential operation disabled, address pointer does not increment. 0 = Sequential operation enabled, address pointer increments. DISSLW: Slew Rate control bit for SDA output. 1 = Slew rate disabled. 0 = Slew rate enabled. HAEN: Hardware Address Enable bit (MCP23S08 only). Address pins are always enabled on MCP23008. 1 = Enables the MCP23S08 address pins. 0 = Disables the MCP23S08 address pins. ODR: This bit configures the INT pin as an open-drain output. 1 = Open-drain output (overrides the INTPOL bit). 0 = Active driver output (INTPOL bit sets the polarity). INTPOL: This bit sets the polarity of the INT output pin. 1 = Active-high. 0 = Active-low. Unimplemented: Read as `0'. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
bit 4
bit 3
bit 2
bit 1
bit 0
(c) 2005 Microchip Technology Inc.
DS21919B-page 13
MCP23008/MCP23S08
1.6.7 PULL-UP RESISTOR CONFIGURATION (GPPU) REGISTER
The GPPU register controls the pull-up resistors for the port pins. If a bit is set and the corresponding pin is configured as an input, the corresponding port pin is internally pulled up with a 100 k resistor.
REGISTER 1-7:
GPPU - GPIO PULL-UP RESISTOR REGISTER (ADDR 0x06)
R/W-0 PU7 bit 7 R/W-0 PU6 R/W-0 PU5 R/W-0 PU4 R/W-0 PU3 R/W-0 PU2 R/W-0 PU1 R/W-0 PU0 bit 0
bit 7-0
PU7:PU0: These bits control the weak pull-up resistors on each pin (when configured as an input) <7:0>. 1 = Pull-up enabled. 0 = Pull-up disabled. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
DS21919B-page 14
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
1.6.8 INTERRUPT FLAG (INTF) REGISTER
Note: The INTF register reflects the interrupt condition on the port pins of any pin that is enabled for interrupts via the GPINTEN register. A `set' bit indicates that the associated pin caused the interrupt. This register is `read-only'. Writes to this register will be ignored. INTF will always reflect the pin(s) that have an interrupt condition. For example, one pin causes an interrupt to occur and is captured in INTCAP and INF. If, before clearing the interrupt, another pin changes which would normally cause an interrupt, it will be reflected in INTF, but not INTCAP.
REGISTER 1-8:
INTF - INTERRUPT FLAG REGISTER (ADDR 0x07)
R-0 INT7 bit 7 R-0 INT6 R-0 INT5 R-0 INT4 R-0 INT3 R-0 INT2 R-0 INT1 R-0 INT0 bit 0
bit 7-0
INT7:INT0: These bits reflect the interrupt condition on the port. Will reflect the change only if interrupts are enabled (GPINTEN) <7:0>. 1 = Pin caused interrupt. 0 = Interrupt not pending. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
(c) 2005 Microchip Technology Inc.
DS21919B-page 15
MCP23008/MCP23S08
1.6.9 INTERRUPT CAPTURE (INTCAP) REGISTER
The INTCAP register captures the GPIO port value at the time the interrupt occurred. The register is `readonly' and is updated only when an interrupt occurs. The register will remain unchanged until the interrupt is cleared via a read of INTCAP or GPIO.
REGISTER 1-9:
INTCAP - INTERRUPT CAPTURED VALUE FOR PORT REGISTER (ADDR 0x08)
R-x ICP7 bit 7 R-x ICP6 R-x ICP5 R-x ICP4 R-x ICP3 R-x ICP2 R-x ICP1 R-x ICP0 bit 0
bit 7-0
ICP7:ICP0: These bits reflect the logic level on the port pins at the time of interrupt due to pin change <7:0>. 1 = Logic-high. 0 = Logic-low. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
DS21919B-page 16
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
1.6.10 PORT (GPIO) REGISTER
The GPIO register reflects the value on the port. Reading from this register reads the port. Writing to this register modifies the Output Latch (OLAT) register.
REGISTER 1-10:
GPIO - GENERAL PURPOSE I/O PORT REGISTER (ADDR 0x09)
R/W-0 GP7 bit 7 R/W-0 GP6 R/W-0 GP5 R/W-0 GP4 R/W-0 GP3 R/W-0 GP2 R/W-0 GP1 R/W-0 GP0 bit 0
bit 7-0
GP7:GP0: These bits reflect the logic level on the pins <7:0>. 1 = Logic-high. 0 = Logic-low. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
(c) 2005 Microchip Technology Inc.
DS21919B-page 17
MCP23008/MCP23S08
1.6.11 OUTPUT LATCH REGISTER (OLAT)
The OLAT register provides access to the output latches. A read from this register results in a read of the OLAT and not the port itself. A write to this register modifies the output latches that modify the pins configured as outputs.
REGISTER 1-11:
OLAT - OUTPUT LATCH REGISTER 0 (ADDR 0x0A)
R/W-0 OL7 bit 7 R/W-0 OL6 R/W-0 OL5 R/W-0 OL4 R/W-0 OL3 R/W-0 OL2 R/W-0 OL1 R/W-0 OL0 bit 0
bit 7-0
OL7:OL0: These bits reflect the logic level on the output latch <7:0>. 1 = Logic-high. 0 = Logic-low. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
DS21919B-page 18
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
1.7 Interrupt Logic
FIGURE 1-6:
The interrupt output pin will activate if an internal interrupt occurs. The interrupt block is configured by the following registers: * GPINTEN - enables the individual inputs * DEFVAL - holds the values that are compared against the associated input port values * INTCON - controls if the input values are compared against DEFVAL or the previous values on the port * IOCON (ODR and INPOL) - configures the INT pin as push-pull, open-drain and active-level Only pins configured as inputs can cause interrupts. Pins configured as outputs have no affect on INT. Interrupt activity on the port will cause the port value to be captured and copied into INTCAP. The interrupt will remain active until the INTCAP or GPIO register is read. Writing to these registers will not affect the interrupt. The first interrupt event will cause the port contents to be copied into the INTCAP register. Subsequent interrupt conditions on the port will not cause an interrupt to occur as long as the interrupt is not cleared by a read of INTCAP or GPIO.
INTERRUPT-ON-PINCHANGE
GPx
INT Port value is captured into INTCAP
ACTIVE Read GPIU or INTCAP
ACTIVE Port value is captured into INTCAP
FIGURE 1-7:
INTERRUPT-ON-CHANGE FROM REGISTER DEFAULT
DEFVAL
GP:
7 X
6 X
5 X
4 X
3 X
2 0
1 X
0 X
GP2
1.7.1
INTERRUPT CONDITIONS
INT ACTIVE ACTIVE
There are two possible configurations to cause interrupts (configured via INTCON): 1. Pins configured for interrupt-on-pin-change will cause an interrupt to occur if a pin changes to the opposite state. The default state is reset after an interrupt occurs. For example, an interrupt occurs by an input changing from 1 to 0. The new initial state for the pin is a logic 0. Pins configured for interrupt-on-change from register value will cause an interrupt to occur if the corresponding input pin differs from the register bit. The interrupt condition will remain as long as the condition exists, regardless if the INTAP or GPIO is read.
Port value is captured into INTCAP
Read GPIU or INTCAP (INT clears only if interrupt condition does not exist.)
2.
See Figure 1-6 and Figure 1-7 for more information on interrupt operations.
(c) 2005 Microchip Technology Inc.
DS21919B-page 19
MCP23008/MCP23S08
NOTES:
DS21919B-page 20
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
2.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Ambient temperature under bias.............................................................................................................-40C to +125C Storage temperature .............................................................................................................................. -65C to +150C Voltage on VDD with respect to VSS ......................................................................................................... -0.3V to +5.5V Voltage on all other pins with respect to VSS (except VDD)............................................................. -0.6V to (VDD + 0.6V) Total power dissipation (Note) .............................................................................................................................700 mW Maximum current out of VSS pin ...........................................................................................................................150 mA Maximum current into VDD pin ..............................................................................................................................125 mA Input clamp current, IIK (VI < 0 or VI > VDD)...................................................................................................................... 20 mA Output clamp current, IOK (VO < 0 or VO > VDD) .............................................................................................................. 20 mA Maximum output current sunk by any output pin ....................................................................................................25 mA Maximum output current sourced by any output pin ...............................................................................................25 mA Note: Power dissipation is calculated as follows: PDIS = VDD x {IDD - IOH} + {(VDD-VOH) x IOH} + (VOL x IOL)
NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
(c) 2005 Microchip Technology Inc.
DS21919B-page 21
MCP23008/MCP23S08
2.1 DC Characteristics
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) Sym VDD VPOR Min 1.8 -- Typ -- VSS Max 5.5 -- Units V V Conditions
DC Characteristics Param No. D001 D002
Characteristic Supply Voltage VDD Start Voltage to Ensure Power-on Reset VDD Rise Rate to Ensure Power-on Reset Supply Current Standby current
D003
SVDD
0.05
--
--
V/ms
Design guidance only. Not tested. SCL/SCK = 1 MHz 4.5V - 5.5V @ +125C (Note 1)
D004 D005
IDD IDDS
-- -- --
-- -- --
1 1 2
mA A A
Input Low-Voltage D030 D031 A0, A1 (TTL buffer) CS, GPIO, SCL/SCK, SDA, A2, RESET (Schmitt Trigger) Input High-Voltage D040 D041 A0, A1 (TTL buffer) CS, GPIO, SCL/SCK, SDA, A2, RESET (Schmitt Trigger) Input Leakage Current D060 D065 D070 I/O port pins Output Leakage Current I/O port pins GPIO weak pull-up current Output Low-Voltage D080 GPIO INT SO, SDA SDA Output High-Voltage D090 GPIO, INT, SO VOH VDD - 0.7 VDD - 0.7 Capacitive Loading Specs on Output Pins D101 D102 Note 1: GPIO, SO, INT SDA CIO CB -- -- -- -- 50 400 pF pF -- -- -- -- V IOH = -3.0 mA, VDD = 4.5V IOH = -400 A, VDD = 1.8V VOL -- -- -- -- -- -- -- -- 0.6 0.6 0.6 0.8 V V V V IOL = 8.5 mA, VDD = 4.5V IOL = 1.6 mA, VDD = 4.5V IOL = 3.0 mA, VDD = 1.8V IOL = 3.0 mA, VDD = 4.5V ILO IPU -- 40 -- 75 1 115 A A VSS VPIN VDD VDD = 5V, GP Pins = VSS -40C TA +85C IIL -- -- 1 A VSS VPIN VDD VIH 0.25 VDD + 0.8 0.8 VDD -- -- VDD VDD V V For entire VDD range. VIL VSS VSS -- -- 0.15 VDD 0.2 VDD V V
This parameter is characterized, not 100% tested.
DS21919B-page 22
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
FIGURE 2-1: LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS
VDD Pin 50 pF 135 pF
1 k SCL and SDA pin MCP23008
FIGURE 2-2:
VDD RESET
RESET AND DEVICE RESET TIMER TIMING
30
32
Internal RESET
34 Output pin
(c) 2005 Microchip Technology Inc.
DS21919B-page 23
MCP23008/MCP23S08
TABLE 2-1: DEVICE RESET SPECIFICATIONS
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) Sym TRSTL THLD TIOZ Min 1 -- -- -- Typ(1) -- Max -- TBD 1 Units s s s VDD = 5.0V Conditions
AC Characteristics
Param No. 30 32 34 Note 1:
Characteristic RESET Pulse Width (Low) Device Active After Reset high Output High-Impedance From RESET Low
This parameter is characterized, not 100% tested.
FIGURE 2-3:
I2CTM BUS START/STOP BITS TIMING
SCL 90 SDA
91 92
93
START Condition
STOP Condition
FIGURE 2-4:
I2CTM BUS DATA TIMING
103 100 101 102
SCL SDA In
90
91
106
107 109
92
109 SDA Out
110
DS21919B-page 24
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
TABLE 2-2:
2
I2CTM BUS DATA REQUIREMENTS (SLAVE MODE)
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) RPU (SCL, SDA) = 1 k, CL (SCL, SDA) = 135 pF
Sym Min Typ Max Units Conditions
I CTM AC Characteristics
Param No.
Characteristic
100
Clock High Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
THIGH 4.0 0.6 0.12 TLOW 4.7 1.3 0.32 TR (Note 1) -- 20 + 0.1 CB 20 TF (Note 1) -- 20 + 0.1 20 TSU:STA 4.7 0.6 0.16 THD:STA 4.0 0.6 0.16 THD:DAT 0 0 0 TSU:DAT 250 100 0.01 TSU:STO 4.0 0.6 0.16 -- -- -- -- -- -- s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) -- -- -- -- -- -- ns ns s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) -- -- -- 3.45 0.9 0.15 s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) -- -- -- -- -- -- s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) -- -- -- -- -- -- s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) CB(2)
(2)
-- -- -- -- -- -- -- -- -- -- -- --
-- -- -- -- -- -- 1000 300 160 300 300 80
s s s s s s ns ns ns ns ns ns
1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp)
101
Clock Low Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
102
SDA and SCL Rise Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
103
SDA and SCL Fall Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
90
START Condition Setup Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
91
START Condition Hold Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
106
Data Input Hold Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
107
Data Input Setup Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
92
STOP Condition Setup Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
Note 1: 2:
This parameter is characterized, not 100% tested. CB is specified to be from 10 to 400 pF.
(c) 2005 Microchip Technology Inc.
DS21919B-page 25
MCP23008/MCP23S08
TABLE 2-2:
2
I2CTM BUS DATA REQUIREMENTS (SLAVE MODE) (CONTINUED)
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) RPU (SCL, SDA) = 1 k, CL (SCL, SDA) = 135 pF
Sym Min Typ Max Units Conditions
I CTM AC Characteristics
Param No.
Characteristic
109
Output Valid From Clock: 100 kHz mode 400 kHz mode 1.7 MHz mode
TAA -- -- -- TBUF 4.7 1.3 N/A CB -- -- TSP -- -- -- -- 50 10 ns ns Spike suppression off -- -- 400 100 pF pF (Note 1) (Note 1) -- -- -- -- -- N/A s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) -- -- -- 3.45 0.9 0.18 s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp)
110
Bus Free Time: 100 kHz mode 400 kHz mode 1.7 MHz mode Bus Capacitive Loading: 100 kHz and 400 kHz 1.7 MHz Input Filter Spike Suppression: (SDA and SCL) 100 kHz and 400 kHz 1.7 MHz
Note 1: 2:
This parameter is characterized, not 100% tested. CB is specified to be from 10 to 400 pF.
FIGURE 2-5:
SPITM INPUT TIMING
3
CS 11 1 Mode 1,1 SCK Mode 0,0 4 SI MSb in LSb in 5 6 10 7 2
SO
high-impedance
DS21919B-page 26
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
FIGURE 2-6: SPITM OUTPUT TIMING
CS 8 SCK 9 2 Mode 1,1 Mode 0,0 12 13 SO MSb out 14 LSb out
SI
don't care
TABLE 2-3:
SPITM INTERFACE AC CHARACTERISTICS
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) Sym FCLK Min -- -- -- Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max 5 10 10 -- -- -- -- -- -- -- -- -- -- -- -- -- 2 2 -- -- -- Units MHz MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns ns s s ns ns ns 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) Note 1 Note 1 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) Conditions 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp)
SPITM Interface AC Characteristics Param No.
Characteristic Clock Frequency
1 2
CS Setup Time CS Hold Time
TCSS TCSH
50 100 50 50
3
CS Disable Time
TCSD
100 50 50
4
Data Setup Time
TSU
20 10 10
5
Data Hold Time
THD
20 10 10
6 7 8
CLK Rise Time CLK Fall Time Clock High Time
TR TF THI
-- -- 90 45 45
Note 1: 2:
This parameter is characterized, not 100% tested. TV = 90 ns (max) when address pointer rolls over from address 0x0A to 0x00.
(c) 2005 Microchip Technology Inc.
DS21919B-page 27
MCP23008/MCP23S08
TABLE 2-3: SPITM INTERFACE AC CHARACTERISTICS (CONTINUED)
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) Sym TLO Min 90 45 45 10 11 12 Clock Delay Time Clock Enable Time Output Valid from Clock Low TCLD TCLE TV 50 50 -- -- -- 13 14 Note 1: 2: Output Hold Time Output Disable Time THO TDIS 0 -- Typ -- -- -- -- -- -- -- -- -- -- Max -- -- -- -- -- 90 45 45 -- 100 Units ns ns ns ns ns ns ns ns ns ns 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) Conditions 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) SPITM Interface AC Characteristics Param No. 9
Characteristic Clock Low Time
This parameter is characterized, not 100% tested. TV = 90 ns (max) when address pointer rolls over from address 0x0A to 0x00.
FIGURE 2-7:
GPIO AND INT TIMING
SCL/SCK SDA/SI In
D1
D0 LSb of data byte zero during a write or read command, depending on parameter.
50
GPn Output Pin 51 INT Pin INT pin active inactive
GPn Input Pin
53
52 Register Loaded
DS21919B-page 28
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
TABLE 2-4: GP AND INT PINS
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) Sym TGPOV TINTD TGPIV TGPINT TGLITCH Min -- -- -- -- -- Typ -- -- -- -- -- Max 500 450 450 500 150 Units ns ns ns ns ns Conditions
AC Characteristics
Param No. 50 51 52 53
Characteristic Serial data to output valid Interrupt pin disable time GP input change to register valid IOC event to INT active Glitch Filter on GP Pins
Note 1:
This parameter is characterized, not 100% tested
(c) 2005 Microchip Technology Inc.
DS21919B-page 29
MCP23008/MCP23S08
NOTES:
DS21919B-page 30
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
3.0
3.1
PACKAGING INFORMATION
Package Marking Information
18-Lead PDIP (300 mil) XXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXX YYWWNNN
Example: MCP23008-E/P^^ e3 0434256
18-Lead SOIC (300 mil)
Example:
XXXXXXXXXXXX XXXXXXXXXXXX XXXXXXXXXXXX YYWWNNN
MCP23008 E/SO^^ e3 0434256
20-Lead SSOP
Example:
XXXXXXXXXXXX XXXXXXXXXXXX YYWWNNN
MCP23S08 e3 ESS^^ XXXXXXXXXXXX 0434256
Legend: XX...X Y YY WW NNN
e3
*
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
Note:
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
(c) 2005 Microchip Technology Inc.
DS21919B-page 31
MCP23008/MCP23S08
18-Lead Plastic Dual In-line (P) - 300 mil (PDIP)
E1
D
2 n 1
E
A2 A L A1 B1
c
eB Units Dimension Limits n p
B
p
MIN
Number of Pins Pitch Top to Seating Plane A .140 .170 Molded Package Thickness A2 .115 .145 Base to Seating Plane A1 .015 Shoulder to Shoulder Width E .300 .313 .325 Molded Package Width E1 .240 .250 .260 Overall Length D .890 .898 .905 Tip to Seating Plane L .125 .130 .135 c Lead Thickness .008 .012 .015 Upper Lead Width B1 .045 .058 .070 Lower Lead Width B .014 .018 .022 Overall Row Spacing eB .310 .370 .430 Mold Draft Angle Top 5 10 15 Mold Draft Angle Bottom 5 10 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-007
INCHES* NOM 18 .100 .155 .130
MAX
MIN
MILLIMETERS NOM 18 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 22.61 22.80 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10
MAX
4.32 3.68 8.26 6.60 22.99 3.43 0.38 1.78 0.56 10.92 15 15
DS21919B-page 32
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
18-Lead Plastic Small Outline (SO) - Wide, 300 mil (SOIC)
E p E1
D
2 B n 1
h
45
c A A2
L A1
Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D h L c B
MIN
.093 .088 .004 .394 .291 .446 .010 .016 0 .009 .014 0 0
INCHES* NOM 18 .050 .099 .091 .008 .407 .295 .454 .020 .033 4 .011 .017 12 12
MAX
MIN
.104 .094 .012 .420 .299 .462 .029 .050 8 .012 .020 15 15
MILLIMETERS NOM 18 1.27 2.36 2.50 2.24 2.31 0.10 0.20 10.01 10.34 7.39 7.49 11.33 11.53 0.25 0.50 0.41 0.84 0 4 0.23 0.27 0.36 0.42 0 12 0 12
MAX
2.64 2.39 0.30 10.67 7.59 11.73 0.74 1.27 8 0.30 0.51 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-051
(c) 2005 Microchip Technology Inc.
DS21919B-page 33
MCP23008/MCP23S08
20-Lead Plastic Shrink Small Outline (SS) - 209 mil Body, 5.30 mm (SSOP)
E E1 p
D
B n
2 1
c A
A2
f L A1
Number of Pins Pitch Overall Height A .079 Molded Package Thickness A2 .065 .073 Standoff A1 .002 Overall Width E .291 .323 Molded Package Width E1 .197 .220 Overall Length D .272 .289 Foot Length L .022 .037 c Lead Thickness .004 .010 f Foot Angle 0 8 Lead Width B .009 .015 *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MO-150
Drawing No. C04-072
Units Dimension Limits n p
MIN
INCHES NOM 20 .026 .069 .307 .209 .283 .030 4 -
MAX
MIN
MILLIMETERS* NOM 20 0.65 1.65 1.75 0.05 7.40 7.80 5.00 5.30 .295 7.20 0.55 0.75 0.09 0 4 0.22 -
MAX
2.00 1.85 8.20 5.60 7.50 0.95 0.25 8 0.38
Revised 11/03/03
DS21919B-page 34
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
APPENDIX A: REVISION HISTORY
Revision B (February 2005)
The following is the list of modifications: 1. Section 1.6 "Configuration and Control Registers". Added Hardware Address Enable (HAEN) bit to Table 1-3. Section 1.6.6 "Configuration (IOCON) Register". Added Hardware Address Enable (HAEN) bit to Register 1-6.
2.
Revision A (December 2004)
Original Release of this Document.
(c) 2005 Microchip Technology Inc.
DS21919B-page 35
MCP23008/MCP23S08
NOTES:
DS21919B-page 36
(c) 2005 Microchip Technology Inc.
MCP23008/MCP23S08
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device
-
X
/XX Package
Examples: a) b) Extended Temp., 18LD PDIP package. MCP23008-E/SO: Extended Temp., 18LD SOIC package. MCP23008T-E/SO: Tape and Reel, Extended Temp., 18LD SOIC package. MCP23008-E/SS: Extended Temp., 20LD SSOP package. MCP23008T-E/SS: Tape and Reel, Extended Temp., 20LD SSOP package. Extended Temp., 18LD PDIP package. MCP23S08-E/SO: Extended Temp., 18LD SOIC package. MCP23S08T-E/SO: Tape and Reel, Extended Temp., 18LD SOIC package. MCP23S08-E/SS: Extended Temp., 20LD SSOP package. MCP23S08T-E/SS: Tape and Reel, Extended Temp., 20LD SSOP package. MCP23S08-E/P: MCP23008-E/P:
Temperature Range
Device
MCP23008: MCP23008T: MCP23S08: MCP23S08T:
8-Bit I/O Expander w/ I2CTM Interface 8-Bit I/O Expander w/ I2C Interface (Tape and Reel) 8-Bit I/O Expander w/ SPITM Interface 8-Bit I/O Expander w/ SPI Interface (Tape and Reel)
c)
d) e)
Temperature Range
E
=
-40C to +125C (Extended) * a)
* While these devices are only offered in the "E" temperature range, the device will operate at different voltages and temperatures as identified in the Section 2.0 "Electrical Characteristics".
b) c)
d) Package P SO SS = = = Plastic DIP (300 mil Body), 18-Lead Plastic SOIC (300 mil Body), 18-Lead SSOP, (209 mil Body, 5.30 mm), 20-Lead e)
(c) 2005 Microchip Technology Inc.
DS21919B-page 37
MCP23008/MCP23S08
NOTES:
DS21919B-page 38
(c) 2005 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2005, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company's quality system processes and procedures are for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2005 Microchip Technology Inc.
DS21919B-page 39
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Alpharetta, GA Tel: 770-640-0034 Fax: 770-640-0307 Boston Westford, MA Tel: 978-692-3848 Fax: 978-692-3821 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 San Jose Mountain View, CA Tel: 650-215-1444 Fax: 650-961-0286 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
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ASIA/PACIFIC
India - Bangalore Tel: 91-80-2229-0061 Fax: 91-80-2229-0062 India - New Delhi Tel: 91-11-5160-8631 Fax: 91-11-5160-8632 Japan - Kanagawa Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Taiwan - Hsinchu Tel: 886-3-572-9526 Fax: 886-3-572-6459
EUROPE
Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Ballerup Tel: 45-4450-2828 Fax: 45-4485-2829 France - Massy Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Ismaning Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 England - Berkshire Tel: 44-118-921-5869 Fax: 44-118-921-5820
10/20/04
DS21919B-page 40
(c) 2005 Microchip Technology Inc.

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